JK Flip-Flop — Working, Truth Table, Excitation Table and Applications

What is a JK Flip-Flop?

The JK flip-flop is an improvement over the SR flip-flop that eliminates the forbidden state. When both J=1 and K=1 (which was forbidden in SR), the JK flip-flop toggles — Q̄ becomes the new Q.

Excitation Table

"What J, K inputs are needed to achieve a desired state transition?"

X = don't care. Key insight: J only matters when Q=0 (setting), K only matters when Q=1 (resetting).

Race-Around Condition

In a level-triggered JK flip-flop with J=K=1 and CLK=1:

This oscillation continues as long as CLK=1. The final state depends on propagation delay — unpredictable!

Solutions:

1. Edge triggering — respond only to clock edge, not level
2. Master-slave flip-flop — isolate input capture from output

Master-Slave JK Flip-Flop

• CLK=1: Master captures J,K; Slave blocked
• CLK=0: Slave transfers Master output to Q; Master blocked
• No race-around possible!

Timing Diagram

Converting JK to Other Flip-Flops

JK → D flip-flop

JK → T flip-flop

JK → SR flip-flop

Applications

1. Toggle frequency divider: J=K=1, output divides clock by 2
2. Counters: JK flip-flops used in ripple and synchronous counters
3. Sequence generators: State machines with toggle capability
4. Memory: Basic storage element

Interview Questions

Q1: What is the characteristic equation of a JK flip-flop? Q(t+1) = J·Q̄(t) + K̄·Q(t). When J=1, K=0: Q→1 (Set). When J=0, K=1: Q→0 (Reset). When J=K=0: Q stays unchanged. When J=K=1: Q toggles.

Q2: Why doesn't the edge-triggered JK flip-flop have a race-around problem? Edge-triggered flip-flops only sample inputs at the instant of the clock edge (a very short window). Even if J=K=1, the output Q changes only once per clock edge because the input sampling window closes immediately after the edge. The feedback from Q cannot affect Q again until the next clock edge.

Q3: How many JK flip-flops are needed for a MOD-16 counter? MOD-16 = 2⁴, so 4 flip-flops. Each flip-flop in toggle mode divides by 2, giving 2⁴ = 16 states: 0000 through 1111.

Q4: What advantage does the JK flip-flop have over the SR flip-flop? The JK flip-flop eliminates the SR's forbidden state (S=R=1). The equivalent condition (J=K=1) becomes well-defined: toggle. Additionally, the excitation table has don't care conditions that allow for more optimization when designing sequential circuits.

Q5: Derive the D flip-flop characteristic from JK by setting J=D, K=D̄. Q(t+1) = J·Q̄(t) + K̄·Q(t) = D·Q̄(t) + D̄̄·Q(t) = D·Q̄(t) + D·Q(t) = D·(Q̄(t)+Q(t)) = D·1 = D. This proves that J=D, K=D̄ converts JK to D behavior.